Digital systems are clocked.

Clocks can be extracted from GPS satellite signals, or locally generated with MEMS oscillators, SAW resonators, quartz crystal (XTAL, XO) or piezo resonators, often set in “ovens” (TCXO, OCXO), derived from atomic properties (like Cesium Beam, Hydrogen Maser, Rubidium, Strontium or Ytterbium), or obtained in another way.

They differ in Absolute Accuracy, Long-term Frequency Stability (e.g. due to aging), Short-term Frequency Stability (due to temperature changes), Phase Noise (aka Jitter), physical size, complexity, immunity to external interference (due to physical vibrations, humidity, EMP, EW), power consumption, cost, etc. These differences are categorized as “Clock Strata”, whereby a clock source must meet a standardized set of requirements for each Stratum level.

Our project is about researching and exploiting the properties of multi-mode crystal oscillators in order to achieve stability comparable to a Stratum 2 Rubidium clock, all at a fraction of the total cost of ownership. We plan on collecting large empirical datasets, constructing experimental prototypes, and using DSP / numerical methods to mitigate temperature variations, dynamic acceleration and static gravity effects. In other words, we aim for XTAL frequency stability by means of numerous mathematical calculations performed in FPGA. We indent to use open-source tools, including CflexHDL+PipelineC HLS flow.

(*) above diagram is just for illustration of the concept, referenced from

(**) there are more methods and numerical approaches in the literature.

This is a Proof-of-Concept (PoC) and stepping stone for future applied research projects on this theme, possibly extending into the field of Artificial Intelligence. 

In addition to a working prototype (PCBs, FPGA Gateware and Embedded Firmware), the project intends to deliver a series of catchy papers.

Project is currently in the planning phase.

Stay tuned for updates…