Let’s play this weekend with compute bits and pieces, homemade on top of Xilinx and 高云半导体 Gowin Semiconductor Corp silicon.
Category: News
A Tang dynasty envoy is sending his greetings from the ETF UNSA
Thank you Seeed Studio and 高云半导体 Gowin Semiconductor Corp for this awesome piece of super-affordable programmable hardware that revolutionized teaching of digital electronics!
What is FuseSoC?
Gluing a system together is what today’s projects are mostly about. That’s where OpenCores.org, FuseSOC (+Edalize), or LiteX come in handy. And the tally does not stop there.
ETFPGA team from the University of Sarajevo
ETFPGA team from the University of Sarajevo, brainstorming the instruction set of their own soft RISC-V picocontroller.
If Assembly is RTL, Then FPGA is for programmers
If you are deeply embedded in the bare-metal SW, Then read on
DATACENTER DEVELOPMENT (BIM)
… with RTL power beating Assembly, shall the FPGA beat CPU in the heart of the Internet, with the marriage of custom crafted logic and immersed cooling?
Why Use FPGA for Mining?
… with energy becoming the non-commodity, what makes RTL win over Assembly is power efficiency without compromising the Power to execute.
The History of the FPGA: The Ultimate Flex
For decades, people have searched for ways to make a chip that you can reprogram after manufacturing. In this video, let us explore the industry’s quest for the ultimate flex.
A robotics microcontroller unit (MCU) with ROS 2 and RISC-V
“…most MCUs used in robotics today have general purpose building blocks. There is not much robotics-specific in any of them… the single most interesting feature of the RISC-V ISA is the possibility of building extensions and customisations… hardware accelerated robotics…”
MCC Lycée from Tešanj is launching an FPGA club for high schoolers
Back-to-school, MCC Lycée from Tešanj is launching an FPGA club for high schoolers, all based on Gowin platform… using a homebrew soft RISC5 processor from a local garage.
