NEWS

Where in the world is the Old Continent on this map?

Huawei may have developed their own #5g chipset, one that can even call over the satellites...

What do PipelineC & pipelining have in common?

The WOSET workshop aims to galvanize the open-source EDA movement. The workshop will bring together EDA researchers who are committed...

AMD(FPGASIC) + Mipsology => Challenge

AMD(FPGASIC) + Mipsology => Challenge...

The Rise of Dresden: How a German City is Becoming a European Manufacturing Leader

Also check who owns GlobalFoundries (GF, owner of the existing Dresden chip fab)...

FPGA Ignite summer23

FPGA Ignite summer23 school has ended today. Be it for the LegUp HLS (which is unfortunately not an open-source tool)...

Igniting Sky130nm open-source PDK

Facilitated by Dirk Koch, the summer23 school at Heidelberg University isn't only about designing FPGA apps, both in traditional #rtl...

12-bit SAR-ADC in SKY130

Here is an outstanding example of contribution to the mixed-signal IP portfolio of open-source SKY130nm process node, courtesy of Manuel...

Code generation tool for control and status registers

Code generation tool for control and status registers...

System on Chip (SoC) Introduction

System on Chip (SoC) Introduction...

AMD(FPGASIC) + Mipsology => Challenge

AMD(FPGASIC) + Mipsology => Challenge...

The Rise of Dresden: How a German City is Becoming a European Manufacturing Leader

Also check who owns GlobalFoundries (GF, owner of the existing Dresden chip fab)...

FPGA Ignite summer23

FPGA Ignite summer23 school has ended today. Be it for the LegUp HLS (which is unfortunately not an open-source tool), Yosys, nextpnr, FABulous...

Igniting Sky130nm open-source PDK

Facilitated by Dirk Koch, the summer23 school at Heidelberg University isn't only about designing FPGA apps, both in traditional #rtl and #hls way...

12-bit SAR-ADC in SKY130

Here is an outstanding example of contribution to the mixed-signal IP portfolio of open-source SKY130nm process node, courtesy of Manuel Moser from...

Code generation tool for control and status registers

Code generation tool for control and status registers...

System on Chip (SoC) Introduction

System on Chip (SoC) Introduction...

ETFPGA at Maker Faire

Playful education, in both Algorithmic and Bitmapping sense, is what the Faculty of Electrical Engineering University of Sarajevo students showcased...

Have you seen Tarik Ibrahimovic’s talk today on all-things-digital/edu?

From a hand-tailored processor, to a complete app you can touch and play...

LILYGO T-FPGA

Here comes a LilyGO kit for HW/SW co-development on a budget, with abundant PSRAM, 高云半导体 Gowin Semiconductor Corp FPGA and wireless connectivity...