NEWS

Why Use FPGA for Mining?

... with energy becoming the non-commodity, what makes RTL win over Assembly is power efficiency without compromising the Power to...

The History of the FPGA: The Ultimate Flex

For decades, people have searched for ways to make a chip that you can reprogram after manufacturing. In this video...

A robotics microcontroller unit (MCU) with ROS 2 and RISC-V

"...most MCUs used in robotics today have general purpose building blocks. There is not much robotics-specific in any of them...

MCC Lycée from Tešanj is launching an FPGA club for high schoolers

Back-to-school, MCC Lycée from Tešanj is launching an FPGA club for high schoolers, all based on Gowin platform... using a...

Competition in the space of FPGA open-source for RISC5 is heating up

That aside, Bajiu-L is one of the most capable boards yet. Have you noticed an uptick in entries from the...

The Hobbyists Who Build Their Own CPUs

The Ring of Homebrew CPUs! >> Guess what?! One is also fermenting in a Tešanj garage... first domestic processor in the...

Connecting @ Connecto Mostar | 2022

Connecting @ Connecto Mostar | INTERA Technology Park | 2022...

Timing Optimization Tutorial

Timing Optimization Tutorial #sta / #timingclosure is the proverbial Rubicon that softy developers ought to cross to put on the hw designer...

Trenz Electronic Launches FPGA Module Featuring Low-Cost GateMate A1

Trenz Electronic Launches FPGA Module Featuring Low-Cost GateMate A1 Cologne Chip AG, the first and only #eu #fpga, on the offensive❗Now in...

Competition in the space of FPGA open-source for RISC5 is heating up

That aside, Bajiu-L is one of the most capable boards yet. Have you noticed an uptick in entries from the Far-Eastern traditions?! This one is Efinix'...

The Hobbyists Who Build Their Own CPUs

The Ring of Homebrew CPUs! >> Guess what?! One is also fermenting in a Tešanj garage... first domestic processor in the region...

Connecting @ Connecto Mostar | 2022

Connecting @ Connecto Mostar | INTERA Technology Park | 2022...

Timing Optimization Tutorial

Timing Optimization Tutorial #sta / #timingclosure is the proverbial Rubicon that softy developers ought to cross to put on the hw designer...

Trenz Electronic Launches FPGA Module Featuring Low-Cost GateMate A1

Trenz Electronic Launches FPGA Module Featuring Low-Cost GateMate A1 Cologne Chip AG, the first and only #eu #fpga, on the offensive❗Now in the Trenz...

1K for 1$

Directly on Amazon, from #China suppliers, this kit is for #retrogaming and serious plays. The game is heating up on #fpga front -- We expect a...

Have you missed Enclustra webinar on design and simulation of fixedpoint dsp, using python, for fpga?!

Have you missed Enclustra webinar on #design and #simulation of #fixedpoint #dsp, using #python, for #fpga?! This workshop, wisely constructed by Dr...

Here we have a cyclone of Arctic aurora, caught in the lattice of low2mid tier FPGA

Here we have a cyclone of Arctic aurora, caught in the lattice of low2mid tier FPGA...

Curbing the gate bloat with bfloat!

The brain float does not stop here: fp80, fp64, fp32, tf32, fp16, bfloat16, fp8, fp8alt, flexpoint, fixedpoint, int8, or even int4, ... The format of...

An intro meeting took place on Friday in Zagreb

An intro meeting took place on Friday in Zagreb … Intergalaktik used the occasion to present us with a set of four #boards from in-house...