NEWS

1K for 1$

Directly on Amazon, from #China suppliers, this kit is for #retrogaming and serious plays. The game is heating up on...

Have you missed Enclustra webinar on design and simulation of fixedpoint dsp, using python, for fpga?!

Have you missed Enclustra webinar on #design and #simulation of #fixedpoint #dsp, using #python, for #fpga?! This workshop, wisely constructed...

Here we have a cyclone of Arctic aurora, caught in the lattice of low2mid tier FPGA

Here we have a cyclone of Arctic aurora, caught in the lattice of low2mid tier FPGA...

Curbing the gate bloat with bfloat!

The brain float does not stop here: fp80, fp64, fp32, tf32, fp16, bfloat16, fp8, fp8alt, flexpoint, fixedpoint, int8, or even...

An intro meeting took place on Friday in Zagreb

An intro meeting took place on Friday in Zagreb … Intergalaktik used the occasion to present us with a set...

Diving Deep into Electronics and Innovation!

Diving Deep into Electronics and Innovation! This is our win-win with 高云半导体 Gowin Semiconductor Corp. And with Xilinx already in, we are working...

Small-scale Analog is the natural first step towards a larger and more complex design

Small-scale Analog is the natural first step towards a larger and more complex design...

Here comes the crown jewel of The Tang Dynasty!

>> There is now even more to do for avid makers and open source developers Thank you Seeed Studio and 高云半导体...

PRVI BOSANSKI RISC V PROCESOR

The Faculty of Electrical Engineering University of Sarajevo is, within the framework of ETFPGA student club, developing eduBos5 -- Their...

Diving Deep into Electronics and Innovation!

Diving Deep into Electronics and Innovation! This is our win-win with 高云半导体 Gowin Semiconductor Corp. And with Xilinx already in, we are working to...

Small-scale Analog is the natural first step towards a larger and more complex design

Small-scale Analog is the natural first step towards a larger and more complex design...

Here comes the crown jewel of The Tang Dynasty!

>> There is now even more to do for avid makers and open source developers Thank you Seeed Studio and 高云半导体 Gowin Semiconductor Corp...

PRVI BOSANSKI RISC V PROCESOR

The Faculty of Electrical Engineering University of Sarajevo is, within the framework of ETFPGA student club, developing eduBos5 -- Their own RISC5...

ex-Yu Iskra –> 4-bit pico-controller in fewer than 1000 LUTs: Hat off to Zoltan Pekic!

Hey eduBos5! You are not the 1st pico in the Balkans. But, you might be the 1st 32-bit in...